(Answered): 3. Homework: Write a Verilog code to implement another 4-bit ALU based on the diagram shown below. ...

3. Homework: Write a Verilog code to implement another 4-bit ALU based on the diagram shown below. In your code, you use the adder subtractor module from Lab 9 to perform the addition and subtraction, and the given mux4x1 to selection the operation. module Alu(A, B, operation, result); //inputs and outputs operation M A // Instantiate and gate and or gate S 4 B+ add sub // connect M to operation[0] C4 10 selo sell 11 MUX 12 result // Instantiate add subtractor and 4 // Instantiate mux4x1 or 13/ endmodule 13 12 4x1 Multiplexer I module mux4xl(io, il, i2, i3, select, y); input i0,11,12,13; input (1:0) select; output y; reg y; always @ (i0 or il or i2 or i3 or select) case (select) 2'b00: y = 10; 2'b01:y=il; 2'b10:y=i2; 2'b11:y=i3; endcasea endmodule 10 S: 50