(Answered): Please help with with answer and explanations. Consider the basic single-cycle MIPS datapath explain ...

Consider the basic single-cycle MIPS datapath explained in class that implements a subset of the MIPS instruction set (R-format, Lw, Sw, beq). Add Add ALU result Shift left 2 RegDst Branch Mem Read Instruction (31-26] MemoHeg Control ALUOp Mem Write ALUS RegWrite PC Zero Instruction (25-21) Read Read address register 1 Read Instruction (2016) Read data 1 Instruction register 2 31-01 Write Read Instruction Instruction [15-11] register dela 2 memory Write data Registers ALU ALU result AddressRead data MESO) Write Data data memory Instruction [15-01 16 32 Sign- extend ALU control Instruction (5-0) Assume we want to implement the instruction jr. Instruction: jr rs Interpretation: PC = R[rs] Which existing blocks will we use? Do we need to add new functional units or modify existing ones? Do we need extra control signals? Specify the value of each control signal (RegDst, ALUSOC, ALUOP, MemRead, MemWrite, Mem ToReg, RegWrite, Branch) as well as the value of any additional signal if needed.